This invention relates to a demodulation device, and more particularly to, a demodulation device of quasi-coherent detection system equipped with a carrier recovery circuit.
In demodulation devices used in communication equipment for satellite communications etc., in order to make the device free from adjustment to reduce the maintenance cost and to stabilize the characteristic, the digitization of device starts coming into practical use. As the system of digitizing the carrier recovery circuit of a demodulation device, there is the quasi-coherent detection system. The quasi-coherent detection is conducted by that the local oscillation signal of LO (local oscillator) which has a frequency near to the carrier frequency but asynchronous and IF (intermediate frequency) signal to be input are multiplied to give BB (base band) signal, further converted into digital signal, where a frequency difference remained a little is compensated by using the carrier recovery circuit formed as a digital circuit. By such a composition, the composition of LO can be changed from VCO (voltage controlled oscillator) to a composition (quasi-coherent detection system) with fixed oscillation frequency by quartz oscillator. Therefore, the adjustment of analogue circuit becomes unnecessary and the variation of characteristic can be prevented.
For the carrier recovery circuit, pull-in range that can compensate the frequency difference of transmission/reception LO of IF and RF (radio frequency) is required. In case of analogue carrier recovery circuit, with a loop bandwidth of carrier recovery PLL (phase-locked loop) in stationary state, the range of pulling into synchronization for carrier cannot be sufficiently secured. Therefore, an oscillator called a sweeper is provided.
FIG. 1 shows a conventional digitized demodulation device of quasi coherent detection system, which is disclosed in Japanese patent application laid-open No. 7-177194 (1995). The demodulation device comprises a demodulator (DEM) 51, a local oscillator (LO) 52, an endless phase shifter (EPS) 53 as a complex multiplier, a synchronous detector (SYNCDET) 54, a sweeper 55, an adder 56, a numerical controlled oscillator (NCO) 57, a phase detector (PD) 58 and a loop filter (LPF) 59.
The sweeper 55 comprises a delay circuit 55a and an adder 55b. Data k and one-bit output of the delay circuit 55a are added by the adder 55b. The delay output of the added value becomes sweep data, which will be control data of NCO 57 through the adder 56.
In the composition of device in FIG. 1, input signal Si is demodulated by DEM 51 and a local oscillator 52, where the demodulated signal is signal that is phase-rotated according to the difference between the carrier frequency of received modulated signal and the oscillation frequency of the local oscillator 52. So, a given correction is made by EPS 53. In PD 58, the phase error of demodulated signal is detected, and further high region is cut by LPF 59. The output signal of LPF 59 is applied through the adder 56 to NCO 57 as a control data. In the synchronous detector 54, the synchronous detection to output of EPS 53 is conducted and the result is applied to the sweeper 55. The sweeper 55 outputs a waveform (saw-tooth wave) with an amplitude corresponding to a desirable range of pulling into synchronization, and this is added to output of the LPF 59 at the adder 56. By this addition result, the oscillation of NCO 57 is controlled so that the oscillation range of NCO 57 is enlarged. By the output frequency of NCO 57, the amount of phase shift at EPS 53 is controlled.
In the carrier pull-in process (in pulling out of synchronization), at first, the sweeper 55 operates so that the oscillation frequency of NCO 57 comes near to the oscillation frequency of input signal Si. When the difference between the carrier frequency of input signal Si and the oscillation frequency of NCO 57 falls within the range of pulling into synchronization of LPF 59, the value of LPF 59 varies to establish the synchronization, when the establishment of synchronization is detected, the operation of the sweeper 55 stops and thereby the operation of pulling into synchronization is completed. A variation of carrier frequency occurred thereafter is followed by using output of LPF 59 to keep the synchronization with carrier.
In recent years, for the purpose of reducing the cost and making the frequency variable, LO of RF section employs a synthesizer system increasingly. In this system, since the phase noise of LO is large, it is necessary to enhance the durability against phase noise, i.e., it is necessary to keep such a condition that pulling out of carrier synchronization is hard to cause by cluttering from outside. The most durable against cluttering from outside is a state that LPF operates around the center value (=0).
FIG. 2 shows a conventional demodulation device of quasi-coherent detection system composed as a modification of the device in FIG. 1. This demodulation device is disclosed in Japanese patent application laid open No. 7-177194 (1995) (ibid. FIG. 1), and the difference from the device in FIG. 1 is a sweeper 60. The sweeper 60 comprises a controller (CONT) 61 as a detection control block, a selector 62 to select either of set values k1 and k2, a register (REG) 63, a selector 64 to select either of clocks CLK1 and CLK2, and an accumulator 65 to conduct a given operation based on outputs of the register (REG) 63 and the selector (SEL) 64. The other components are the same as those in FIG. 1, therefore its explanation is omitted herein.
In SEL 62 either of the set value k1 for addition and the set value k2 for subtraction can be selected, and is SEL 64 either of CLK1 with high speed and CLK2 with low speed can be selected. The sweeper 60 is actuated when the synchronous detector 54 detects the pulling into synchronization or pulling out of synchronization.
When the pulling out of synchronization is detected, CONT 61 starts controlling so that the set value k1 for addition is selected by SEL 62 and CLK1 with high speed is selected by SEL 64. According to CLK1, ACC 65 conducts the accumulation, and output of ACC 65 is applied through the adder 56 to NCO 57 as control data. Also, when the pulling into synchronization is detected by the synchronous detector 54. ACC 65 stops accumulating and the output value is held. Hereupon, SEL 62 is switched into the set value k2 for subtraction and SEL 64 is switched into CLK2 with low speed.
In the pulling out of synchronization, based on pull out detection signal from the synchronous detector 54, SEL 62 selects the set value k1 for addition and SEL 64 selects CLK1 with high speed. Thereby, REG 63 is set to the set value k1 for addition, and ACC 65 accumulates the set value k1 for addition based on CLK1, this accumulation result is applied through the adder 56 to NCO 57 as control data. Also, when pull-in detection signal from the synchronous detector 54 is input, REG 63 is cleared by CONT 61 and the sweep data is held. Then, CONT 61 controls SEL 62 to select the set value k2 for subtraction and controls SEL 64 to select CLK2 with low speed. According to CLK2 with low speed, ACC 65 accumulates the set value k2 for subtraction set at REG 63. Hereupon, the sweep data reduces gradually so that PLL can follow sufficiently, when coming to zero or near to zero, CONT 61 clears REG 63.
In the pulling into synchronization, based on pull in detection signal from the synchronous detector 54, CONT 61 clears REG 63. Thereby, input of ACC 65 becomes zero, the sweep data at that time is held. Then, as described above, REG 63 is set to the set value k2 for subtraction and the sweep data reduces gradually. When CONT 61 detects the sweep data comes to zero or near to zero in the period that pull-in detection signal is applied, it clears REG 63. Hereupon, although the sweep data is kept at zero, this is in the same state that the sweeper 60 is separated from PLL.
However, in the conventional demodulation device, since the carrier frequency of input signal can be included into output of LPF, LPF may operate deviated from the center value. Therefore, when such a deviation frequency from the center frequency is large, the durability against the cluttering of frequency in the positive or negative to the pull-in frequency reduces. As a result, there is a problem that the operation becomes unstable.
Accordingly, it is an object of the invention to provide a demodulation device that the durability against the cluttering of frequency is enhanced regardless of the frequency difference between the carrier frequency of input signal and the frequency of internal local oscillator, and a constant synchronous characteristic can be obtained.
According to the invention, a demodulation device, comprises:
a demodulating means that conducts the primary demodulation of received modulation wave; and
a carrier recovery circuit that regenerates a carrier from demodulation signal by the demodulating means and conducts the secondary demodulation of baseband signal using the carrier;
wherein the carrier recovery circuit comprises:
a complex operation part that conducts the phase correction of the primary demodulation signal by the demodulating means;
a phase error detection circuit that detects the phase difference of output signal of the complex operation part;
a loop filter that suppresses noise component of output signal of the phase error detection circuit;
a sweeper that generates a predetermined sweep waveform according to carrier synchronous information;
a processing circuit that conducts a processing to bring a value of the loop filter near to its center value after the carrier synchronization is established;
an adding means that calculates a value of automatic phase control (APC) by adding three signals of output signal of the loop filter, output signal of the sweeper and output signal of the processing circuit; and
a controlled oscillator that outputs a signal to bring the error component of phase and frequency output from the complex operation part phase near to zero to the complex operation part according to output signal of the adding means.